The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 1992
Filed:
Jan. 02, 1990
Junichi Yoshimura, Hino, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A digital communication terminal equipment is coupled between one or a plurality of low-speed group transmission paths and one or a plurality of high-speed group transmission paths. The digital communication terminal equipment comprises a reference part and a supervised part coupled between selected low-speed group transmission paths and high-speed group transmission paths depending on states of first and second switches, and a bit comparison supervision part for detecting a bit error in a transmission signal which is transmitted between the low-speed group transmission path and the high-speed group transmission path. The reference part has a demultiplexer circuit which demultiplexes a high-speed group signal which is received from the high-speed group transmission path via the second switch into a low-speed group signal, a memory for storing the low-speed group signal from the demultiplexer circuit in response to a write clock signal which is multiplexed within the high-speed group signal, a phase locked loop circuit which includes a voltage controlled oscillator and controls a read out from the memory in response to a read clock signal which is derived by smoothing the write clock signal, and a state detector for detecting an unstable change in an input voltage of the voltage controlled oscillator and for outputting a control signal. The control signal has a level for disabling an operation of the bit comparison supervision part when the state detector detects the unstable change in the input voltage of the voltage controlled oscillator.