The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 1992
Filed:
Oct. 24, 1989
Applicant:
Inventor:
Barry C Rosales, Acton, MA (US);
Assignee:
SILC Technologies, Inc., Burlington, MA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 223 ; 371 221 ; 371 251 ;
Abstract
The invention is a method for designing testability into an integrated circuit. This method is termed register transfer scan (RTS). The RTS method comprises two primary rules. The first rule is that every global feedback path in the functional circuit must contain at least one scannable storage element, i.e. it must be accessible such that data can be placed into it or read from it without passing the data through the functional circuitry of the chip. The second rule of the RTS method is that the controls for those storage elements that are not scannable are held inactive when data is being scanned into or out of the scannable storage elements.