The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 1992
Filed:
May. 15, 1991
Leonard J Hitchcock, Montrose, PA (US);
Michael M Walters, Endwell, NY (US);
Ronnie A Wunderlich, Endicott, NY (US);
IBM Corporation, Armonk, NY (US);
Abstract
The present invention is a circuit and method for reducing switching losses in a full bridge, resonant transition, switching power converter. The converter circuit includes a bridge switching circuit having an FET switch in each leg of the bridge. Each FET has a parasitic drain-to-source capacitance. The primary of a power transformer is connected across the bridge. Two secondary windings of the transformer are connected in a center-tapped configuration. A saturable reactor and a rectifier is connected in series with each secondary winding. A control means controls the conduction interval of the FET switches to produce a first and a second half-cycle of converter operation, each half-cycle including an on-time and a free-wheeling interval. The saturable reactors force unequal current distribution in the secondary windings during the free-wheeling intervals such that a primary current is caused to flow. This primary current is used to charge the parasitic capacitances of the FET switches such that each FET is switched ON only when its drain-to-source voltage is near zero.