The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 1992
Filed:
Mar. 09, 1990
Shigeru Hirahata, Yokohama, JP;
Shinobu Torikoshi, Yokohama, JP;
Toshiyuki Sakamoto, Fujisawa, JP;
Takumi Okamura, Yokohama, JP;
Noboru Kojima, Kawasaki, JP;
Tetsuo Mitsuhashi, Zama, JP;
Isao Kondo, Tokyo, JP;
Yuichi Ninomiya, Kawasaki, JP;
Koichi Yamaguchi, Yokohama, JP;
Toshiro Ohmura, Mitaka, JP;
Hitachi, Ltd., Tokyo, JP;
Nippon Hoso Kyokai, Tokyo, JP;
Abstract
There is disclosed a compatible television receiver capable of receiving and reproducing both the standard system television signal and the high definition television signal and capable of confining the degradation of picture quality of the high definition television signal to the minimum, in which the received standard system television signal and high definition television signal are respectively converted to non-interlace signals, and scanning is selectively performed with either of non-interlace video signals to display images. The television receiver according to the present invention comprises a first conversion circuit for receiving an interlace standard system television signal and converting it into a non-interlace television signal, a second conversion circuit for receiving an interlace high definition television signal and converting it into a non-interlace televison signal, a circuit for discriminating whether the received signal is the standard system television signal or the high definition signal, and a circuit for selecting either of outputs of the first and second conversion circuits on the basis of the result obtained in the discrimination circuit.