Semiconductor memory device

Abstract

A semiconductor device includes a first semiconductor region connected to a bit line for controlling signal charges; a second semiconductor region connected to the first semiconductor region and to a word line for controlling signal charges, wherein the second semiconductor region has a type of electrical conductivity which is different from that of the first semiconductor region; and a third semiconductor region connected to the second semiconductor region and to a data line for reading the signal charges, wherein the third semiconductor region has a type of electrical conductivity which is the same as that of the first semiconductor region, and wherein the third semiconductor region has a barrier at the interface with the data line, the barrier being able to be controlled by the bit line and the word line to store signal charges in the third semiconductor regions. The barrier may be a Schottky barrier or a thin insulating film which can be controlled by the bit and word lines for writing, holding and reading of information charges in the third semiconductor region. A fourth semiconductor region may be arranged between the first and the third semiconductor regions in parallel to the second region as in a junction field effect transistor.