The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 1992

Filed:

Aug. 14, 1991
Applicant:
Inventors:

Shigeru Fujii, Yokohama, JP;

Kouichi Yamashita, Machida, JP;

Tomoaki Tanabe, Yokohama, JP;

Yoshio Kuniyasu, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307443 ; 307451 ; 307475 ;
Abstract

As the number of output circuits in LSI or VLSI circuits increases, the chance of many large output circuits operating as a same instant increases, which can cause a malfunction in the logic due to induced switching noise. In order to prevent such a problem, the switching speed of the driving buffer circuit for an output buffer circuit is controlled. By reducing the switching capacity of the driving circuit, the switching speed of the total circuit is not greatly affected and the noise is greatly decreased. Control of the switching capacity of the driving buffer circuit is performed by master slice technology. This opposite design concept, compared to that of prior art LSI design, has been proved by experiments.


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