The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 1992

Filed:

Aug. 01, 1991
Applicant:
Inventor:

Stanley E Jaffe, Santa Rosa, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ; H03L / ; H03L / ; H03L / ;
U.S. Cl.
CPC ...
331-2 ; 331-4 ; 331 10 ; 331 14 ; 331 16 ; 331 17 ; 331 25 ;
Abstract

A phase-lock loop for a swept synthesized source in which hysteresis, tuning nonlinearity, and drift over time and temperature of an oscillator incorporated into the swept synthesized source are compensated. The tuning current to the oscillator is initialized to zero to eliminate hysteresis effects. Then, the pretune current is set to produce the minimum operating frequency of the oscillator. Next, the main phase-lock loop is closed, and a low-frequency synthesizer is swept to in turn sweep the oscillator over a selected frequency span. If the selected frequency span extends over other frequency bands, the oscillator is swept to the maximum frequency of the present band and held at this frequency by a track and hold circuit. The main phase-lock loop is opened, the low-frequency synthesizer is re-initialized, the main phase-lock loop is again closed, and the low-frequency synthesizer is swept again. Each frequency band is crossed in a similar manner until the selected frequency span is swept. In order to improve phase-noise and transient response performance of the low-frequency synthesizer, a phase-lock loop speed-up and stability enhancement circuit comprising a zener diode connected across a passive lag-lead network is incorporated. Pretune calibration for the swept synthesized source is also provided.


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