The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 1992

Filed:

Nov. 21, 1990
Applicant:
Inventors:

Takanori Nawa, Inuyama, JP;

Naomi Mori, Kuwana, JP;

Hideji Sumi, Kani, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307455 ; 307475 ; 307466 ; 307356 ;
Abstract

A semiconductor integrated circuit includes an emitter-coupled logic circuit coupled between a first power source line and a second power source line. The emitter-coupled logic circuit has a differential circuit and an output buffer circuit. A wiring line is provided which is coupled to the emitter of a first transistor of the output buffer circuit and which carries an output signal of the emitter-coupled logic circuit to a circuit of the next stage. The semiconductor integrated circuit also includes a second transistor having an emitter coupled to the emitter of the first transistor, a collector coupled to the first power source line, and a base supplied with a second reference voltage, and a constant-current source coupled to the emitter of the first and second transistors and allowing a constant current to selectively pass through either the first transistor or the second transistor. A current switching circuit is formed by the first and second transistors and the constant-current source, and the constant current passes through either the first transistor or the second transistor on the basis of a potential of the base of the first transistor and the second reference voltage applied to the base of the second transistor.


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