The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 1992
Filed:
Aug. 27, 1990
Richard G Fogg, Jr, Austin, TX (US);
Arturo M de Nicholas, Austin, TX (US);
John C O'Quin, III, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The system and method of this invention allows a simulated processor to receive an interrupt request from I/O devices. A simulated interrupt controller routine determines whether to post an interrupt to the simulated CPU. The simulated interrupt controller routine posts an interrupt to the simulated CPU by updating one byte, which is owned by the simulated interrupt controller, of a two byte halfword. The other byte is owned by the simulated CPU and is updated by the simulated CPU when its internal interrupt enabled state changes. Each byte of the two byte halfword is updated independently, but is loaded by the simulated CPU with only one instruction to determine if an interrupt should be acknowledged. The simulated CPU minimizes the overhead of polling for an interrupt by performing a graph analysis of the instruction flow of control to determine the locations to poll for interrupts. The simulated CPU polls for an interrupt when an instruction transfers control dynamically, once around a loop, and when an instruction changes the interrupt enabled state of the simulated CPU.