The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 1992

Filed:

Dec. 20, 1989
Applicant:
Inventor:

Robert J Russell, South Boston, MA (US);

Assignee:

Bull HN Information Systems Inc., Billerica, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371-22 ;
Abstract

A memory system containing groups of random access memory (RAM) devices further includes apparatus for distributing input memory addresses so diffused so as to cause the selection of different relative physical cell locations within each RAM device being accessed to provide a single word of information.


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Russell, Robert. (1992). Method of organizing a memory for fault tolerance (U.S. Patent No. 5128941). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5128941

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