Data processing apparatus for producing in sequence pulses having

Abstract

A CPU includes a program counter, an execution unit, and a program status word register. A pulse producing unit connected to the CPU includes a plurality of output terminals, a port selection register for designating at least one of the output terminals, and a system for generating a pulse start timing signal, a system responsive to the pulse start timing signal for bringing the designated output terminal into one of two bistable logic states. A counter counts a clock pulse signal and brings the selected output terminal into the other of the bistable logic states when the counter indicates a predetermined elapsed time. Another system responsive to the pulse start timing signal sends a signal to the CPU requesting a macro service operation. A system responsive to the request of the macro service operation suspends the program being executed, and a system performs the macro service operation, without saving the contents of the program counter and the program status word register into the data memory and while holding the contenst thereof as they are. The program being executed is resumed after the macro service operation has ben completed. The pulse producing unit may be coupled to a fuel injection device in an engine unit, and may have an input terminal for receiving a pulse request signal from the engine unit.