The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 1992
Filed:
Feb. 15, 1991
Larry P Hobbs, Brentwood, CA (US);
New SD, Inc., San Francisco, CA (US);
Abstract
An integrating voltage-to-frequency converter and method for converting a DSB-SC signal into a frequency-encoded signal. The DSB-SC signal is demodulated using an up/down counter, the count direction of which is alternatively switched in synchronism with the phase polarity of a reference carrier signal for the DSB-SC signal. The converter includes an integrator, a comparator, and means for rebalancing the integrator circuit. Means for tracking and storing a partial-bit analog signal level at the output of the integrator are provided, where the partial-bit analog signal level is obtained just prior to a phase transition of the reference carrier signal. The count of the up/down counter is corrected thereby to account for the partial-bit analog signal information. A capacitor is used to sample the partial-bit analog signal information and to transfer that information into the input of the operational amplifier to provide an opposite polarity correction charge to the integrator to correct for the partial-bit analog signal information as it is detected by the up/down counter. A digital system for converting the partial-bit analog signal level to a binary code word is provided. A number of binary code words are summed together to form an algebraic sum and means are provided for detecting that the algebraic sum exceeds a certain value so that a correction count for the up/down counter demodulator is provided to increment the up/down counter.