The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 1992
Filed:
Dec. 14, 1990
Applicant:
Inventor:
Vladimir W Volovich, San Jose, CA (US);
Assignee:
Cybeg Systems, Inc., Menlo Park, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B65G / ;
U.S. Cl.
CPC ...
414786 ; 356400 ; 250548 ; 414757 ; 414779 ; 198394 ;
Abstract
A prealigner for semiconductor wafers is described, together with a method for prealigning. The prealigner includes mechanism for holding the wafer in a non-slip manner and motive means for adjusting the position of its engagement with the wafer as necessary to make the geometric center of the wafer precisely coincident with a chose position. The alignment method results in eliminating parts of original equations during the calculations of the location of the geometric center and flats or other distinguishing features on the edge of the wafer are located by utilizing a particular equation for a plurality of overlapping sections of the edge.