The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 1992

Filed:

Jan. 22, 1991
Applicant:
Inventors:

Fred Y Cho, Scottsdale, AZ (US);

David Penunuri, Fountain Hills, AZ (US);

Robert F Falkner, Jr, Phoenix, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
29 2501 ; 148D / ; 148D / ; 437190 ; 437195 ; 437980 ;
Abstract

A passivation layer of dielectric material disposed on the top surface of the semiconductor device prevents the metallized patterns on the semiconductor substrate from being exposed to chemical attack. This layer also provides for improved metal electro-migration resistance through the well-known mechanism of grain boundary pinning. The semiconductor device substrate includes a dielectric layer which is disposed along the surface over the electrode metallization. The semiconductor substrate includes metallized regions on top of the dielectric layer which is disposed over the substrate surface and the electrodes thereon. These metallized regions form capacitors to the semiconductor electrodes and capacitively couple electrical input and output signals to the electrodes from external electronic apparatus.


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