Bipolar integrated circuit having a unit block structure

Abstract

A semiconductor integrated circuit comprises a plurality of first hierarchical units of logic devices each including a plurality of bipolar logic devices having a polycell structure. The bipolar logic devices have a first standardized size in a first direction and are arranged in a second direction for a second standardized size in each first hierarchical unit. Each of the first hierarchical units is defined by first and second main edges extending in the second direction for the second standardized size, and first and second side edges extending in the first direction for the first standardized size. Each of the first hierarchical units consumes a generally identical electric power and has a first power feed system extending in the second direction for the second standardized size for feeding the electric power to the bipolar logic devices therein. At least a part of the first hierarchical units are arranged in the first direction to form a plurality of second hierarchical units having respective lengths in the first direction wherein the first and second side edges are aligned in the first direction in each of the second hierarchical units. Further, the second hierarchical units are disposed such that there are at least two second hierarchical units having respective positions which are different in the second direction. Furthermore, there is provided a second power feed system extending in the first direction so as to cross the first power feed system for feeding the electric power thereto.