The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 1992
Filed:
Jan. 24, 1991
Applicant:
Inventor:
Teruo Seki, Kasugai, JP;
Assignees:
Fujitsu Limited, both of, JP;
Fujitsu VLSI Limited, both of, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307475 ; 307451 ; 307446 ; 307443 ; 307448 ;
Abstract
An input signal is received by a level shift circuit to generate a plurality of level-shifted output signals which have different shift amounts to each other. A switch circuit, selectively outputs the level-shifted output signals in response to a logic level of the input signal. The switch circuit selects a signal having a higher potential from the level-shifted output signals when the logic level of the input signal indicates a first level, and selects a signal having a lower potential from the level-shifted output signals when the logic level of the input signals indicates a second level.