The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 1992

Filed:

Oct. 05, 1990
Applicant:
Inventor:

Hironori Nagasawa, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307448 ; 307475 ;
Abstract

A source-coupled FET-logic-type logic circuit having level shift elements connected to a high-potential power supply, field-effect transistors, load elements connecting the sources of the field-effect transistors, field-effect transistors coupled between the high-pontential power supply and a low-potential power supply, constant current sources, and complementary output terminals. The circuit further has a field-effect transistors controlled by complementary signals input to two input terminals. The circuit, which is a T flip-flop, further comprises a frequency switching circuit composed of field-effect transistors which are controlled by the signals supplied to two switching terminals. When the first switching terminal is at a high level, the output terminals outputs a signal having the same frequency as the input signal. When the first switching terminal is at a low level, the output terminals outputs a signal having half the frequency of the input signal.


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