The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 1992

Filed:

Jul. 10, 1991
Applicant:
Inventors:

Louis L Hsu, Fishkill, NY (US);

Seiki Ogura, Hopewell Junction, NY (US);

Joseph F Shepard, Hopewell Junction, NY (US);

Paul J Tsang, Poughkeepsie, NY (US);

Assignee:

IBM Corporation, Armonk, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 41 ; 437 44 ; 437913 ; 437235 ; 437245 ;
Abstract

A method of forming an LDD field effect transistor with an inverted 'T'-gate structure in which consecutive, conformal layers of polysilicon, metal and nitride or oxide are deposited to fill the recess in a composite interconnect layer on top of a trench isolated region of a semiconductor substrate. These conformal layers successively decrease in thickness and are selectively etched in two steps to form a self-aligned inverted T structure. A first reactive ion etch (RIE) step preferentially etches the exposed outer polysilicon to a certain depth. During a second step RIE the polysilicon layer is completely etched down to the a gate oxide surface and the metal layer is preferentially etched so that subtends only the remaining nitride or oxide cap.


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