The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1992
Filed:
Nov. 20, 1990
Applicant:
Inventor:
Tsutomu Hatano, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 40 ; 357 45 ; 357 41 ; 364491 ;
Abstract
A set of input and output buffers are arranged in an outer peripheral portion of a semiconductor chip and a macro region and a set of internal gates are arranged in an inside portion of the semiconductor chip. The input and output buffers are connected to the internal gates through a boarder region between the macro and the set of the internal gates.
Hatano, Tsutomu. (1992). Gate array semiconductor integrated circuit device (U.S. Patent No. 5119158). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5119158
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile