The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 1992
Filed:
Jul. 26, 1990
Roger J Gravrok, Eau Claire, WI (US);
Raymond M Warner, Jr, Edina, MN (US);
Regents of the University of Minnesota, St. Paul, MN (US);
Abstract
A digital logic circuit having multiple inputs and a product-of-sums output uses multi input OR circuits with interacting constant-current and constant-voltage elements to improve voltage transfer characteristics. A second-level arbitration circuit connects to the OR circuits and provides mutually exclusive pull-up and pull-down control signals as a logical function of the states of the OR circuits. An output stage connects to the arbitration circuit. The output stage comprises pull-up and pull-down drivers responsive to the output of the second-level arbitration circuit. The digital logic circuit operates at high speed because its transistors are prevented from entering saturation. The logic circuit is easily expandable and provides a simple and direct method of implementing logic circuits which provide product-of-sums outputs.