The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 1992
Filed:
Apr. 03, 1989
Applicant:
Inventors:
John R Hayes, Laurel, MD (US);
Susan C Lee, Columbia, MD (US);
Assignee:
The Johns Hopkins University, Baltimore, MD (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395800 ; 364239 ; 3642396 ; 3642443 ; 364247 ; 3642477 ; 3642545 ; 364251 ; 3642513 ; 364933 ; 3649336 ; 364955 ; 3649576 ; 364965 ; 3649654 ; 364D / ; 364D / ;
Abstract
An efficient hardware cache manager controls the top-of-stack data underflow/overflow. A processor chip includes a processor, a stack buffer and the invented cache management hardware. The processor chip communicates with a remove overflow stack through an address/data bus. The cache management hardware efficiently manages overflow and underflow to and from the processor chip in such a manner less than 1% of the processor's time is spent managing the stack cache.
Quick Actions:
Hayes, John. (1992). Stack data cache having a stack management hardware with internal and (U.S. Patent No. 5107457). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5107457
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile