The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 1992
Filed:
Nov. 16, 1990
Emel S Bulat, Framingham, MA (US);
Richard M Klein, Framingham, MA (US);
GTE Laboratories Incorporated, Waltham, MA (US);
Abstract
In the fabrication of a junction field effect transistor, specifically a static induction transistor, an epitaxial layer of high resistivity N-type silicon is grown on a substrate of low resistivity N-type silicon. A plurality of elongated parallel grooves separated by interposed ridges are formed by reactive ion etching. A layer of silicon oxide is grown on all exposed surfaces including the side walls and bottoms of the grooves. Fluorine is ion implanted into the silicon oxide. The grooves are filled with deposited silicon oxide or polycrystalline silicon, and material is removed to form a flat planar surface with the silicon at the surfaces of the ridges exposed. P-type doping material is ion implanted into alternate (gate) ridges. The wafer is heated to diffuse the P-type doping material and form gate regions. Heating also activates the implanted fluorine ions which react with unbonded silicon atoms at the silicon oxide-silicon interface thus quenching vacant bond sites. N-type doping material is ion implanted in the top of the intervening (source) ridges. Metal contacts are applied to the gate ridges, source ridges, and the bottom of the substrate.