The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 1992
Filed:
Dec. 29, 1989
Joe E Brewer, Severna Park, MD (US);
Westinghouse Electric Corp., Pittsburgh, PA (US);
Abstract
A method and apparatus for providing a flexible and adaptive communication link from one of four wafer input/output channels respectively located on each of four sides of a silicon wafer to a predetermined internal memory-logic site includes in a matrix array of indentical memory-logic sites located on the wafer. A new linkage path can be formed, if necessary, each time a memory-logic is accessed. Each memory-logic site is capable of communicating with any of its neighboring sites, which includes not only its four opposing sides, but also its four adjacent diagonal sites, by one of a plurality of input/output site ports. A programmed external controller coupled to a computer, for example, works from the edge of the wafer through the selected wafer input/output channel and links to any designated memory-logic site for the purpose of data storage, data retrieval or test.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile