The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 1992
Filed:
Dec. 28, 1990
Larry J Polllock, Santa Clara County, CA (US);
Synergy Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A substrate tap is incorporated in an integrated circuit which comprises a plurality of transistors formed in isolated device regions in a substrate material comprising a layer of N-type material over a layer of P-type material. The isolated device regions are defined by isolating slots extending down through said N-type material and into the P-type material. The trench for each substrate tap extend down to said P-type material and has an oxide layer lining the sidewalls of trench, a doped polysilicon layer covering the sides and bottom of said trench, and a doped implant or diffused region formed at the base of and in contact between the tap and the substrate. The substrate beneath the devices is connected to a negative potential to isolate the devices on said substrate. Preferably, the substrate tap includes a silicide layer formed over said polysilicon layer to enhance contact to said doped implant region.