The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 1992

Filed:

Apr. 13, 1990
Applicant:
Inventors:

Renny L Eisele, Manachaca, TX (US);

Kirk N Holden, Austin, TX (US);

B Chris DeWitt, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307448 ; 307451 ; 307481 ; 307354 ; 307358 ; 307585 ;
Abstract

A self-adjusting precharge level circuit for coupling to an N-channel precharged bus line. The precharge circuit comprises first, second, and third N-channel transistors and first and second inverters. The first transistor couples the bus line to a positive power supply voltage terminal during a precharge period when the voltage on the bus line falls below the positive power supply voltage minus an N-channel MOS transistor threshold. The second and third transistors together couple the bus line to a second power supply voltage terminal during the precharge period when the voltage level of the bus line rises above positive power supply voltage minus the N-channel MOS therehold, after the voltage level is sensed by the first and second inverters. Sensing and adjusting the voltage in this manner allows the circuit to maintain an N-channel precharge level on a bus which has circuits driving CMOS levels coupled to it, while dampening the voltage response and suppressing oscillation.


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