The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 1992

Filed:

Mar. 11, 1991
Applicant:
Inventors:

Clinton C Kuo, Austin, TX (US);

Ko-Min Chang, Austin, TX (US);

Mark S Weidner, Austin, TX (US);

Philip S Smith, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365226 ; 365 96 ; 365104 ; 365185 ; 3072966 ; 307318 ; 357 235 ;
Abstract

Zener diodes that are formed concurrently with flash EEPROM cells are utilized to regulate programming voltages for programming a flash EEPROM cell (37). A selected bit-line (38) is voltage regulated with both a zener diode (19) and a bias transistor (36). The bias transistor is activated during programming to prevent breaking down a drain junction of a flash EEPROM cell, which would generate hot-electrons and cause a runaway programming problem. The regulated voltage on the bit-line is also utilized to optimize programming characteristics of a flash EEPROM cell, and to minimize disturbing a programmed logic state of flash EEPROM cells connected to a commonly selected bit-line. A separate zener diode (17) provides a regulated voltage for a selected word-line (40) during programming. By regulating the voltage of the word-line during programming, a program disturb problem associated with a high voltage word-line is minimized.


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