The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 1992
Filed:
Apr. 18, 1990
William M Lowe, Austin, TX (US);
Leland F Rusk, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
There is disclosed an improved clock generator responsive to a first clock signal having a frequency f.sub.1 and a second clock signal having a frequency f.sub.2, wherein f.sub.2 is equal to nf.sub.1. The clock generator provides a fixed duty cycle clock signal having a period equal to n complete cycles of the second clock signal and being at a first level for m complete cycles of the second clock signal and a second level for n-m complete cycles of the second clock signal. The clock generator includes a counter for counting half-cycles of the second clock signal to derive the first and second levels, and a flip-flop for establishing a timing condition responsive to the first clock signal. The clock generator further includes an inhibit circuit coupled to the counter for enabling the counter to begin a new counting period in response to the counter counting n complete cycles of the second clock signal and the establishment of the timing condition. The clock generator inhibit circuit guarantees a consistent duty cycle signal output immune to variations of the period of the first clock signal to as low as n-1/2 complete cycles of the second clock signal.