The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 1992
Filed:
Mar. 26, 1990
Kyoji Matsusako, Kanagawa, JP;
Burr-Brown Corporation, Tucson, AZ (US);
Abstract
An interpolation DAC includes first and second registers connected to receive the X least significant and Y most significant bits of a digital input word, and are clocked to latch the X least significant bits and Y most significant bits at a first clock rate. An adder has a first group of X inputs, a second group of X inputs, X outputs, and a carry output. A third register has X inputs, and X outputs coupled to the second group of X inputs of the adder. The third register is clocked to latch the outputs of the adder at a second clock rate which is the oversampling ratio times faster than the first clock rate. A Y bit plus 1 bit DAC in which the 1 bit is a duplicate of the least significant of the Y bit section has its most significant Y bits coupled to receive the outputs of the second register. The duplicate LSB is connected to receive the carry output from the adder. A low pass filter responsive to the Y bit plus 1 bit DAC produces an analog output representative of a value of the digital input word. The digital-to-analog conversion rate of the Y bit section of the Y bit plus 1 bit DAC can be performed at the slow first clock rate.