The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 1992
Filed:
Dec. 10, 1990
Ando Electric Co., Ltd., Tokyo, JP;
Abstract
A timing signal delay circuit comprises a counter placed with first delay setting data (21-24) for counting a first clock signal (12) in response to an input timing pulse (11), and a first flip-flop circuit which has a D-input supplied with the output of the counter (1) and a clock input supplied with a second clock signal of the same timing frequency as the first clock signal. For doubling resolution of the delay which the input timing pulse undergoes, there are provided an exclusive-OR gate (4) supplied with a second dealy data signal (31) and a third clock signal (14) of the same timing as the second clock signal (13), an AND gate (5) supplied with the output of the exclusive-OR gate (4) and that of the first flip-flop (3), and a second flip-flop supplied with the output of the AND gate (5) and a fourth clock signal (15) having twice as high frequency as that of the first clock (12). The input timing pulse can be delayed with high resolution or accuracy.