The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 1992

Filed:

Jul. 10, 1991
Applicant:
Inventor:

Isao Nakayama, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307494 ; 307529 ; 328155 ; 328158 ; 328160 ;
Abstract

A Costas loop carrier wave reproducing circuit includes a first differential amplifier circuit, a second differential amplifier circuit, a multiplying circuit, a first square circuit, a second circuit, and a double-balanced differential amplifier circuit. The first differential amplifier circuit obtains an inphase output from an inphase demodulated signal obtained by performing synchronous detection of a component inphase with a four-phase modulated wave. The second differential amplifier circuit obtains an orthogonal output from an orthogonal demodulated signal obtained by performing synchronous detection of an orthogonal component of the four-phase modulated wave. The multiplying circuit multiplies outputs from the first and second differential amplifier circuits. The first square circuit obtains a square output of an output from the first differential amplifier circuit. The second square circuit obtains a square output of an output from the second differential amplifier circuit. The double-balanced differential amplifier circuit obtains an output difference between the first and second square circuits and outputting a product of the output difference and an output from the multiplying circuit as a PLL control signal.


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