The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 1992
Filed:
Sep. 26, 1990
Georges Neu, Mareil Sur Mauldre, FR;
Bull S.A., Paris, FR;
Abstract
Each programming point (11) of the programmable logic network (10) according to the invention is made with a field effect transistor (N1), the gate and drain of which are connected respectively to the input (Lx) and output (Ly) lines, and the source of which is connected both to the reference potential, via the drain-to-source path of a second field effect transistor (N2), the gate of which is connected to the output line (Ly), and to the base of a bipolar transistor Q, the emitter-to-collector path of which is disposed between the ground and output lines. A network according to the invention has an increased operating speed and can be used in a read-only memory or in PLA circuits.