The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 1992
Filed:
Dec. 12, 1989
John O Boese, Bridgewater, NJ (US);
Patrick J Donnelly, Bridgewater, NJ (US);
Warren S Gifford, Holmdel, NJ (US);
Gabriel G Schlanger, West Orange, NJ (US);
Bell Communications Research, Inc., Livingston, NJ (US);
Abstract
A real time fault tolerant transaction processing system, particularly one suited for use in a service control point (SCP), is described. Specifically, the system utilizes a communication protocol, such as signalling system 7, that adaptively distributes message packets on an equal basis over multiple physical links that connect two points, such as an SCP and a signalling transfer point (STP), and non-fault tolerant front end and back end processors that are connected to each physical link for processing packets appearing on that link and providing corresponding responses thereto. All the front and back end processors are loosely coupled together for purposes of processor synchronization and re-assignment. Through this system, all the physical links simultaneously carry an equal number of packets which are, in turn, processed by all the processors connected thereto. In the event any physical link or either a front or back end processor connected thereto fails, then that link is declared to be out of service. Consequently, the protocol merely re-assigns all subsequently occurring packets to the other links until such time as the fault is cleared. As the result of link re-assignment, there is advantageously no need to connect a fault tolerant processor to each physical link. This, in turn, substantially and advantageously reduces the complexity and cost of the fault tolerant transaction processing system.