The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 1992
Filed:
May. 30, 1989
Roger P Gregor, Endicott, NY (US);
International Business Machines Corp., Armonk, NY (US);
Abstract
A bidirectional level shifting interface circuit has first and second I/O ports and an FET with a drain-source channel connected between the first and second I/O ports. The first I/O port is connected to an I/O port of a first digital circuit operating at a relatively low supply voltage, and the second I/O port is connected to an I/O port of a second digital circuit operating at a relatively high supply voltage. This channel passes communication signals in each direction between the first and second digital circuit. A latching circuit comprising a P Channel FET is biased by the relatively high voltage supply, has an output connected to the second I/O port, and has a control input. The interface circuit further comprises an inverter circuit having a control input connected to the second I/O port and an inverted output connected to the control input of the latching FET such that when the second I/O port exhibits a binary one voltage caused by the first digital circuit, the inverted output exhibits a binary zero voltage to activate the P Channel FET to latch the second I/O port at sufficient voltage to drive the second digital circuit at binary one level.