Programmable logic device with global and local product terms

Abstract

A programmable logic device having a programmable AND (product term) array formed with input terms on both global and local busses and with both global and local product term lines. Each macrocell of the device, whether as input/output macrocell connected to an I/O pin or a buried macrocell providing only feedback, connects to and receives an inputs both global and local product terms. In one embodiment, global product terms are connectable to the global bus and to a local bus corresponding to a particular group or quadrant of macrocells. Local product terms are only connectable to that local bus, and thus only a fraction of the terms available to the global product terms. In an alternate embodiment, global product terms are connectable to the global bus and to a set of local busses which is a prope subset of all of the local busses. Local product terms are connectable only to the particular local bus assigned to a particular group or quadrant of macrocells and to a fraction of the terms on the global bus.