The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 1991

Filed:

Mar. 28, 1991
Applicant:
Inventor:

Steven C Taylor, Hillsborough, CA (US);

Assignee:

Verilink Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L / ; H04L / ;
U.S. Cl.
CPC ...
380 48 ; 375108 ; 375109 ; 375112 ;
Abstract

A dual-framing-bit-alignment apparatus having a communications channel, a data device, an encryptor, a framing-bit device, a decryptor, a first framing-bit repositioner, and a second framing-bit repositioner. The first data device generates a first data-bit sequence having a first framing-bit sequence. The encryptor encrypts the first data-bit sequence as an encrypted-bit sequence. The framing-bit device substitutes on the encrypted-bit sequence, a second framing-bit sequence, thereby generating a framed-encrypted-bit sequence. The decryptor decrypts the framed-encryped-bit sequence as a second data-bit sequence. The second data-bit sequence contains errors due to the second framing-bit sequence. A second framing-bit repositioner detects in the second data-bit sequence, the first framing-bit sequence and the errors. In response to detecting the errors and the first framing-bit sequence, the first framing-bit repositioner aligns the first framing-bit sequence with the second framing-bit sequence.


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