The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 1991
Filed:
Jan. 30, 1989
Akira Kanuma, Yokohama, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A logic circuit having a plurality of macrocells for processing test input data and outputting a result of the process. Each of the macrocells is tested independently of each other and includes an input-output circuit. The input-output circuit comprises: a first holding register for holding the test input data; a selector circuit for shutting off an input path for normal operation signals to the macrocell in question at the time of testing the macrocell, selecting the test input data held in the first holding register, and outputting the selected test input data to a logic circuit to be tested in the macrocell; a second holding register for holding test output data obtained as a result of a test process carried out in the macrocell based on the test input data, and outputting the test output data externally; and a switching circuit for shutting off, at the time of testing the macrocell, an output path for normal operation signals from the microcell to other portions of the logic circuit.