The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 1991
Filed:
Jun. 09, 1989
Applicant:
Inventors:
William A Samaras, Haverhill, MA (US);
David T Vaughan, Tyngsboro, MA (US);
Assignee:
Digital Equipment Corporation, Maynard, MA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H01L / ;
U.S. Cl.
CPC ...
3072721 ; 307480 ; 3074821 ; 3073031 ; 3072722 ; 307269 ;
Abstract
A VSLI circuit includes a plurality of state device circuits on a VLSI chip. Each of the state device circuits includes a latch and is clocked by a pulse generator circuit which produces narrow pulses that are coupled to the clock input of the latch. The narrow pulses have a pulse width substantially equivalent to the propagation delay through the latch of the state device circuits. By taking advantage of the high correlative percentages of devices on portions of the chip, master-slave flip flops can be implemented using only a single latch with a pulse generator.