The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 1991
Filed:
Oct. 04, 1990
Kwang-byeok Seo, Seoul, KR;
Tae-young Jeong, Hanam, KR;
Samsung Electronics Co., Ltd., Kyunggi-do, KR;
Abstract
A method for manufacturing a BOX structured stack type capacitor of a semiconductor device is disclosed. The method comprises the steps of: defining an active region by forming a field oxide film on a semiconductor substrate of a first conductivity type; forming, on the active region, a gate electrode, a source region and a drain region of a transistor and forming a first conductive layer on a predetermined portion of the field oxide film and forming a first insulating layer on the gate electrode and the first conductive layer; forming a second insulating layer on the resultant structure; forming an opening in order to expose a portion of said source region and then depositing a second conductive layer on the entire surfaces of said second insulating layer and of the exposed substrate; forming a third insulating layer pattern of a saddle type by coating a third insulating layer on the second conductive layer; depositing a third conductive layer on the resultant structure; etching the third conductive layer disposed above the source region; removing said third insulating layer pattern and forming a first electrode pattern of a capacitor; and forming a dielectric film and a fourth conductive layer in turn on the resultant structure. In the method, the capacitance is increased by forming a storage node of a BOX structure and by using the inside and outside of the BOX structure as the effective area of the capacitor.