The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 1991
Filed:
Jun. 21, 1990
Yoshihiko Mizushima, Shizuoka, JP;
Kazutoshi Nakajima, Shizuoka, JP;
Toru Hirohata, Shizuoka, JP;
Takashi Iida, Shizuoka, JP;
Yoshihisa Warashina, Shizuoka, JP;
Kenichi Sugimoto, Shizuoka, JP;
Tomoko Suzuki, Shizuoka, JP;
Hirofumi Kan, Shizuoka, JP;
Hamamatsu Photonics K.K., Shizuoka, JP;
Abstract
SUM and CARRY output signals of a first optical half adder are provided to one input terminal of a second optical half adder and an optical latch memory, respectively, and an output signal of the optical latch memory is provided to the other input terminal of the second optical half adder. Input and output of the two optical half adders and optical latch memory are performed through an optical signal. Each optical half adder includes two light-receiving elements each having a symmetrical electrode arrangement in which two Schottky junctions are connected to each other opposite in polarity, and peripheral elements of resistors, a capacitor and an amplifier. The optical latch memory is an optical flip-flop memory in which a high-speed light-receiving element produces an electric signal in response to an input optical signals, and a high-speed light-emitting element produces, in response to the electric signal guided from the light-receiving element, feed-back light to be applied to the light-receiving element and an output optical signal.