High-power, high-performance integrated circuit chip package

Abstract

The high-power, high-performance integrated circuit chip package comprises a chip constructed to contain top and bottom surfaces to which top and bottom metallization planes are fixed. Top and bottom heat sinks are fixedly mounted to the top metallization plane and bottom metallization plane, respectively. The metallization planes and heat sink combination functions as both a power lead and a heat dissipation means, allowing for the chip to contain signal connections which may be dedicated to input and output signal paths. The chip further comprises a plurality of contiguous top layers of thin dielectric material, at least one epitaxial layer on whichis mounted a plurality of transistors and associated circuitry, and at least one bottom layer of crystalline silicon material. The plurality of transistors and associated circuitry generates heat. Such heat may then be dissipated by following a first or second thermal path, the first path proceeding through the plurality of contiguous top layers, through the top metallization plane to the top heat sink and the second thermal path proceeding through at least one bottom layer through the bottom metallization plane to the bottom heat sink.