The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 1991
Filed:
Sep. 05, 1990
Applicant:
Inventor:
William H Gascoyne, San Jose, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307443 ; 307242 ; 307243 ; 307572 ; 307590 ; 307591 ; 307595 ; 307600 ; 307601 ; 364490 ; 364569 ; 324 731 ; 324617 ; 324621 ;
Abstract
In accordance with the present invention, a process monitor circuit and a method for monitoring a process are provided. The process monitor circuit provides first and second logic paths, the first logic path having a delay sensitive to whether the input logic transition is from logic high to logic low, or from logic low to logic high. The second logic path has substantially equal delays for either logic state transition. The two differences in delay between the first and second logic paths under the two logic state transitions are used to monitor the process steps for manufacturing the P and N transistors.