The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 1991
Filed:
May. 26, 1989
Ronald D Baxter, Furlong, PA (US);
Paul M Kroninger, Jr, North Wales, PA (US);
General Signal Corporation, Stamford, CT (US);
Abstract
This invention provides a method for producing header mounted sensors, such as a chemically sensitive ISFET structures, which comprises steps which include providing a plurality of electrochemically sensitive ISFET sites on a semiconductor substrate with a source region, a drain region and an electrochemically sensitive gate region on the front of said substrate with contacts for said regions on the back of the substrate. A glass carrier, such as borosilicate glass is provided for the substrate. The carrier has a hole in it to maintain uncovered the contact areas of the ISFET sites and the carrier also has leads to provide electrical access to the area of the holes from the edges of the carrier. The substrate is electrostatically bonded to the glass carrier at the periphery of each of the ISFET sites and the boundaries of the individual ISFET sites are V-groove etched to form isolated individual silicon mesas each representing an individual ISFET structure. After formation of the individual mesas a passivation coating is deposited over the front of the substrate in a manner which will not obviate the chemical sensitivity of the gate region. There is then provided electrical contact from the contact areas of the ISFET to the metallized electrical leads of the carrier and the wafer is then diced at the site boundaries to produce individual chemically sensitive ISFET structures.