The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 1991
Filed:
Aug. 04, 1989
Applicant:
Inventor:
Thomas E Moore, Edmonton, CA;
Assignee:
Telecommunications Research Laboratories, Edmonton, CA;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J / ; H04J / ;
U.S. Cl.
CPC ...
370112 ; 370 84 ; 370102 ;
Abstract
A DS-3 to 28 VT1.5 SONET Interface Circuit is shown, without using standard intermediate DS-2 and DS-1 Desynchronizer Phase-Lock Loops. The elimination of DS-2 and DS-1 Desynchronizer Phase Lock Loops results in a significant reduction in cost and complexity of SONET interface circuits for the existing asynchronous digital multiplex hierarchy.
Moore, Thomas. (1991). Method and apparatus for mapping a digital signal carrier to another (U.S. Patent No. 5067126). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5067126
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile