The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 1991
Filed:
Mar. 28, 1990
Applicant:
Inventors:
Tohru Nojiri, Tokyo, JP;
Masahiro Kainaga, Yokohama, JP;
Assignee:
Hitachi, Ltd., Tokyo, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364786 ;
Abstract
In an adder control circuit, a plurality of full adders are so arranged that a carry bit of the full adder for calculating low orders of values to be added is inputted to the full adder for calculating high orders thereof. In this case, the addresses are controlled in response to a clock having a time period which is more than a maximum calculation time period among calculation time periods by the respective full adders required for outputting the carry bits, and is less than a total calculation time period of all full adders.