The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 1991
Filed:
Dec. 29, 1989
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A delay circuit having a complementary insulated gate device comprises an inverter (10) having a series connection of a p type field effect transistor Q3 and an n type field effect transistor Q4 and a transmission gate (20) having a parallel connection of a p type field effect transistor Q1 and an n type field effect transistor Q2 connected to the preceding stage of the inverter (10), and the gates of the transistors Q1 and Q2 are connected together to an output terminal (3). The logical threshold voltage of the inverter (10) is set at a higher value in the range of the input voltage of the inverter (10). There is a peculiar period in which the transistors Q1 and Q2 of the transmission gate (20) transmit only a litle increase of the input voltage to the inverter (10) during the increase of the input voltage. Due to the existence of this peculiar period, this circuit outputs a delayed output signal only when the input voltage increases. In addition, the rise time and fall time of the output signal are short.