The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 1991
Filed:
Mar. 23, 1990
Applicant:
Inventor:
Kouji Tanagawa, Tokyo, JP;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307465 ; 307449 ; 307469 ; 307481 ; 364716 ;
Abstract
A programmable logic array circuit which has a decoder, a sense amplifier and a latching circuit. The decoder decodes an instruction code into an output signal after a first precharge timing. The latching circuit latches the output signal from the decoder immediately before a second precharge timing. The gate circuit controls an output operation of the latching circuit in response to a prescribed timing signal.
Tanagawa, Kouji. (1991). Programmable logic array circuit having a gate to control an output (U.S. Patent No. 5059828). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5059828
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile