The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 1991
Filed:
Oct. 19, 1989
Masanobu Yoshida, Yokohama, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A NAND gate circuit which can be used for a decoder circuit, includes a high potential voltage source (V.sub.cc), an output terminal (V.sub.OUT), and a load element (T.sub.1) connected between the high potential electric voltage source (V.sub.cc) and the output terminal (V.sub.OUT). A driving circuit is serially connected with the output terminal (V.sub.OUT), and a low potential voltage source (V.sub.ss), and has a plurality of driving transistors (T.sub.2, T.sub.3) which are serially arranged. An input signal is applied to each gate. At least one transistor, constituting the driving circuit, has a driving performance different from the other transistors of the driving circuit. An ideal NAND gate circuit can be provided in which erroneous operation due to noise can be effectively prevented by setting the input threshold voltage to a constant voltage no matter what the combination of the input signals.