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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5055990 B1

PDFFull Text
Date of Patent:
Oct. 08, 1991

Filed:

Jan. 17, 1990

Snubber circuit for power conversion semiconductor elements and assembly

Applicant:
Inventors:

Hiroshi Miki, Tokyo, JP;

Yoshitaka Fujiwara, Koube, JP;

Kiyoshi Iida, Matumoto, JP;

Hiromu Takubo, Tokyo, JP;

Kunio Shibayama, Koube, JP;

Shinichi Kobayashi, Matumoto, JP;

Assignee:

Fuji Electric Co., Ltd., , JP;

Attorney:

Brumbaugh, Graves, Donohue & Raymond

Primary Examiner:

William H Beha, Jr

Int. Cl.
CPC ...
H02M / ;
U.S. Cl.
CPC ...
363 56 ; 363132 ;
Abstract

A snubber network of high energy efficiency for use with power conversion semiconductors is described. Asymmetrical semiconductor elements are used to reduce and dissipate voltage spikes induced by stray inductance during turn-off of power semiconductors. A space efficient assembly using the described snubber network containing asymmetrical semiconductor elements and an external snubber capacitor is also described.

Find Patent Forward Citations

Miki, Hiroshi. (1991). Snubber circuit for power conversion semiconductor elements and assembly (U.S. Patent No. 5055990). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5055990

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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