Double-diffused metal-oxide semiconductor field effect transistor device

Abstract

A double-diffused metal-oxide-semiconductor field effect transistor (DMOSFET) device comprising an insulating layer having an opening on the top surface of a semiconductor wafer, channel regions and well regions and source regions formed through two stage deffusions of impurity materials respectively of a different conductivity type from and the same conductivity type as the wafer and carried out through the opening, and further comprising gate, source and drain electrodes which are formed after mashes provided on a surface area where the drain regions and the source electrode regions that are to be connected to the well regions and source regions and a further ion-implantation of an impurity material of the same conductivity type as the wafer into the channel regions, with the threshold voltage controlled to achieve a depletion type. The channel regions are relatively lower in the carrier corcentration than the other parts in the well regions to achieve a high breakdown voltage notwithstanding that the device is of the depletion type.