The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 1991
Filed:
Mar. 06, 1989
Kiyoshi Kanazawa, Katano, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
Determination of an operation of a logic circuit is usually called logic simulation. The logic simulation in which changes in signal status at input terminals and output terminals of an element in the logic circuit to be simulated are represented by events and the signal status at the output terminal is calculated only for the element in which the event has occurred at the input terminal thereof, is called an event driven logic simulation. In the event driven logic simulation, a current time is used to decide and extract the event to be processed. In the prior art apparatus, the decision and extraction are interrupted when the current time is updated. In the present invention, identifiers (colors) are imparted to the events to group the events. The current time is updated when the event having a special color is not present. Thus, a simulation speed in the event driven logic simulation method and apparatus is improved.